1. Technical Field of the Invention
The present invention pertains generally to display devices and, more particularly, relates to driving circuits thereof. The invention can be applied to driving methods for either simple matrix or active matrix displays. The invention is also applicable to display devices including such flat-panel displays as liquid crystal displays (LCDs) and electroluminescent displays, in which light transmittance, reflectance, refractive index, luminous intensity or other properties are varied by applying electrical signals in a controlled manner, and not including cathode ray tubes (CRTs).
2. Description of the Related Art
Matrix display devices incorporating a plurality of display elements arranged in matrix form are employed particularly in flat-panel displays as large capacity display means. Conventionally known matrix display devices include simple matrix type in which individual display elements arrayed in rows and columns have no built-in actuating devices and active matrix type in which each individual display element is associated with an active device such as a transistor or a diode. In the following description, a column signal line refers to each signal line for transmitting an electrical signal which contains a video signal, and a row signal line refers to each signal line for transmitting an electrical signal which does not contain any video signal.
In either type of matrix display device, basic construction is such that peripheral driving circuits containing addressing circuits are arranged in the periphery of the matrix structure for providing signals to the row and column signal lines. These driving circuits are called the row driving circuit and column driving circuit. For example, Japanese Unexamined Patent Application No. 57-41078 discloses an arrangement employing a shift register as an addressing circuit for active matrix display devices, whereas Japanese Unexamined Patent Application No. 62-265696 discloses an arrangement employing a decoder including AND gates and NAND gates as an addressing circuit for active matrix display devices.
The peripheral driving circuit of the conventional, matrix display device used to be formed on an integrated semiconductor circuit of the prior art, and connected to the matrix structure formed on a glass substrate using such bonding technique as a tape automated bonding (TAB) operation. Spacings between individual row and column signal lines have decreased in recent years as a result of increasing demand for greater display capacity of matrix displays and more compact matrix structure. This necessitates that the peripheral driving circuit be formed on the same substrate as the matrix structure in monolithic form. It is difficult to connect the individual lines with line spaces of 100 xcexcm or less by TAB technology since the TAB operation is based on application of mechanical pressure. In the aforementioned construction in which the peripheral driving circuit is formed on the same substrate as the matrix of display elements, it is possible to utilize photolithography. In an ideal case, photolithography enables reduction of line spacing to a level practically equal to the level of design rule requirements.
It has recently been recognized, however, that a reduction in the area of individual display elements could give rise to problems related to circuit configuration. More specifically, even when the peripheral driving circuit is formed on the same substrate as the matrix of display elements in monolithic form, a circuit for supplying electrical signals to individual signal lines should have such line widths that equal to or smaller than the spaces between the individual signal lines. As an example, each stage of a shift register contained in the peripheral driving circuit includes approximately 10 transistors, and it is essential that the circuit be designed in such a way that these transistors fall within widths of the individual signal lines. In a case where the circuit is designed based on a 5 xcexcm design rule, for instance, permissible minimum width of each signal line is 30 xcexcm and, therefore, dimensions of each display element become at least 30 xcexcm by 30 xcexcm.
According to prior art driving techniques for a matrix display device, its row signal lines are sequentially driven from top to bottom (or from bottom to top). This means that the conventional matrix display devices can not be operated by a commonly used interlaced scanning process, in which groups of odd-numbered horizontal lines and even-numbered horizontal lines are scanned in alternate vertical scans. This limitation of the matrix display devices is disadvantageous when displaying quickly moving images. Furthermore, it is essential to convert video signals from interlaced scanning to noninterlaced scanning in order to display an ordinary video input.
LCD display devices usually employ line inversion or dot inversion display techniques to prevent picture degradation due to mutual interference between accumulated charges (i.e., image information) in adjacent display elements. This requires an additional process of converting image information.
Higher-speed scanning is required as the display capacity of matrix display devices increases. As an example, the video graphics array (VGA) standard (640 by 480 pixels) requires a 9 MHz clock whereas the engineering workstation (EWS) standard requires a clock frequency of more than 30 MHz. Since the peripheral driving circuits of the matrix display devices formed in monolithic form are produced by the use of such a semiconductor material as polycrystalline silicon, which is inferior to single-crystal, an increase in operating speed is not preferable.
It is an object of the invention to provide a solution to at least one of the aforementioned problems of the prior art.
In one form of the invention, a display device comprises a plurality of display elements arranged on a substrate to form a matrix structure, and at least first and second row driving circuits for supplying signals to individual rows of the matrix structure, the row driving circuits being located separately from and parallel to each other on the same substrate as the matrix structure, wherein a signal for any row signal line adjacent to a given row signal line to which a signal is supplied from the first row driving circuit is supplied from other than the first row driving circuit.
The above defined display device may be constructed in such a way that one of the row driving circuits is located to the left of the matrix structure while another is located to the right of the matrix structure, or all the row driving circuits are located to the left or right of the matrix structure.
In another form of the invention, a display device comprises a plurality of display elements arranged on a substrate to form a matrix structure, and at least first and second column driving circuits for supplying signals to individual columns of the matrix structure, the column driving circuits being located separately from and parallel to each other on the same substrate as the matrix structure, wherein a signal for any column signal line adjacent to a given column signal line to which a signal is supplied from the first column driving circuit is supplied from other than the first column driving circuit.
Construction of this display device may be such that one of the column driving circuits is located above the upper edge of the matrix structure while another is located below the lower edge of the matrix structure, or all the column driving circuits is located above the upper edge or below the lower edge of the matrix structure.
In either form of the invention, the display device may be constructed in such a way that all the row driving and column driving circuits employ shift registers for use as addressing circuits, or all the row driving and column driving circuits employ decoders for use as addressing circuits. Alternatively, the construction of the display device may be such that each row driving circuit employs a shift register as an addressing circuit while each column driving circuit employs a decoder as an addressing circuit, or vice versa.
In a case where two or more row driving or column driving circuits employing shift registers as addressing circuits are provided separately from each other, the construction of the display device may be such that a select signal outputted from a last stage of the first driving circuit is entered to a first stage of the second driving circuit.
In a case where two or more row driving or column driving circuits employing decoders as addressing circuits are provided separately from each other, the construction of the display device may be such that these decoders are controlled by a common counter.
Where the display device comprises two or more column driving circuits, it may be constructed in such a way that signals for driving display elements in a plurality of columns of the matrix structure may be simultaneously supplied to the respective column signal lines.
In either the first or second form of the invention described above, it is possible to reduce the longitudinal dimension of each stage (to which each signal line is connected) of a driving circuit. If two column driving circuits are provided at separate sites from each other, for example, the number of column signal lines that branch out from each column driving circuit can be halved. This means that twice as many column signal lines can be laid by dividing a single column driving circuit into two, provided that the width of each signal line is unchanged. In other words, twice as many display elements (pixels) can be formed in a given surface area compared to the conventional matrix structure.
The aforementioned feature of the invention is described in more detail by way of example. Provided that the overall length of a column driving circuit of a conventional matrix display is 19.2 mm and 640 column signal lines branch out from the column driving circuit, the interval between successive column signal lines is 30 xcexcm. In other words, each stage of the column driving circuit takes up a longitudinal dimension of 30 xcexcm. If two such column driving circuits, designed with the same signal line intervals, are provided parallel to each other at separate sites according to the invention, the number of column signal lines is doubled. Specifically, a total of 1280 column signal lines branch out from the two column driving circuits so that the effective line-to-line interval becomes 15 xcexcm, although the actual interval between the individual column signal lines branching out from each column driving circuit remains 30 xcexcm. It is possible anyway to produce a matrix display of a larger scale.
In one variation of the invention, the length of each column driving circuit may be halved. Although the number of column signal lines that can be connected to each column driving circuit decreases to 320, the total number of column signal lines branching out from two column driving circuits remains 640. This results in a reduction in pixel dimensions and an increase in integration level. Three, four, or more separate column driving circuits may be provided to achieve three times, four times, or further higher integration level or larger matrix scale.
The above discussion also applies to the row driving circuits and row signal lines.
In another feature of the invention, it is possible to scan odd-numbered and even-numbered horizontal lines, or rows of display elements, in alternate vertical scans to perform interlaced scanning. This is achieved by configuring the first and second driving circuits in such a way that a select signal outputted from the last stage of the first driving circuit is entered to the first stage the second driving circuit in a case where the two driving circuits employ shift registers as addressing circuits. If the first and second driving circuits employ decoders as an addressing circuits, the decoders should be controlled by a common counter to perform interlaced scanning.
It is also possible to scan every second rows, every third rows, and so forth if there are provided three, four, or more separate column driving circuits and they are driven in a prescribed sequence.
On the other hand, video signals can be simultaneously supplied to a plurality of column driving circuits by driving them substantially at the same time (provided that there is no signal delay except for unavoidable delays caused by different wiring lengths, for instance). This makes it possible to reduce the operating frequency of the individual column driving circuits. As an example, if four column driving circuits are provided for driving a matrix display conforming to the VGA standard (640 horizontal lines), 160 column signal lines are to be connected to each column driving circuit and the operating frequency of each column driving circuit becomes 2.3 MHz, one-fourth the normal operating frequency.
Further, the foregoing another form of the invention where a given column signal line is supplied with a signal from a first column driving circuit and another column signal line adjacent to the given column signal line is supplied with a signal from a second column driving circuit can be used to supply a positive video signal and a negative video signal on the same display frame in line inversion, that is, polarities of video signals are different from each other between adjacent column signal lines by supplying the positive video signal from the first column driving circuit and supplying the negative video signal from the second column driving circuit. Dot inversion of the video signal polarity can also be performed easily in a similar way.